This invention was made in part with Government support under Grant Numbers DE-FG02-91ER40635 and DE-FG-91ER40635 awarded by the Department of Energy. The Government may have certain rights in this invention.
This invention pertains to low resolution data acquisition systems.
Many types of data acquisition systems are known, for example transitory recorders and digital oscilloscopes, in which it is necessary to convert one or several analog signals into one or several digital signals capable of being stored in a digital memory and processed by a digital processor. These systems comprise generally an input stage constituted of one or several digitizers and of a memory for digitized data; the processor accesses the memory most often through a bus. In low-frequency systems, this memory can for example be constituted directly by the RAM of a computer. The digitized data are stored in this memory and processed by the processor of this computer either in real time or later (e.g., after all the data have been acquired).
There data acquisition systems fit into essentially two types of data acquisition systems. These two types are a dedicated microprocessor based minicomputer system and a simple data logger. The computer systems often include disc memory for data storage, CRT terminals for display of data and printers for hard copies of data. These systems have high resolution (16 bit and higher) analog to digital (A/D) converters and use twisted/shielded cabling from the sensors to the A/D converter located on a central computer. As a result, the systems are expensive and require a relatively large capital investment. While simple data loggers are relatively inexpensive, they offer simple functions only such as logging data and comparing the data to setpoints.
In accordance with the present invention, a low resolution data acquisition system is provided that is capable of using a large number of sensors at low cost. The data acquisition system converts analog signals into digital data samples and transfers the digital data samples to a host controller. The data acquisition system has readout modules that are connected in series to each other. Each readout module includes a field programmable gate array (FPGA), analog to digital converters coupled to the FPGA, and an output register that controls digital switches.
Each FPGA receives a command from the host processor to send the digital data samples to the host controller, commands the analog to digital converters to convert the analog signals to the digital data samples, obtains the digital data samples, and sends the digital data samples to the host controller. The command includes an address. The FPGA determines if the command is addressed to it. If the command is not addressed to it, the FPGA sends the command to the readout module that is connected to the FPGA output.
A high speed communication bus is used which couples the readout modules to the host controller. The high speed communication bus includes an optical serial interface for communicating data to the host controller. This allows the readout modules to be mounted at long distances from the host controller. In one embodiment, the high speed communication bus includes a RS422 interface.
The invention solves these and other problems of data acquisition systems by providing a system which efficiently digitizes information from a multiplicity of channels and transfers it to a host processor.